stm32f4xx/chip_specific/clock_constants.rs
1// Licensed under the Apache License, Version 2.0 or the MIT License.
2// SPDX-License-Identifier: Apache-2.0 OR MIT
3// Copyright OxidOS Automotive SRL.
4//
5// Author: Ioan-Cristian CÎRSTEA <ioan.cirstea@oxidos.io>
6
7//! Clock-related constants for a particular chip
8
9/// PLL-related constants for specific for a specific chip
10pub trait PllConstants {
11 /// PLL minimum frequency in MHz
12 const MIN_FREQ_MHZ: usize;
13 /// PLL maximum frequency in MHz
14 // All boards support PLL frequencies up to 216MHz
15 const MAX_FREQ_MHZ: usize = 216;
16}
17
18/// Generic clock constants for a specific chip
19pub trait SystemClockConstants {
20 /// Maximum allowed APB1 frequency in MHz
21 const APB1_FREQUENCY_LIMIT_MHZ: usize;
22 /// Maximum allowed APB2 frequency in MHz
23 // APB2 frequency limit is twice the APB1 frequency limit
24 const APB2_FREQUENCY_LIMIT_MHZ: usize = Self::APB1_FREQUENCY_LIMIT_MHZ << 1;
25 /// Maximum allowed system clock frequency in MHz
26 const SYS_CLOCK_FREQUENCY_LIMIT_MHZ: usize;
27}
28
29/// Clock constants for a specific chip
30pub trait ClockConstants: SystemClockConstants + PllConstants {}
31
32impl<T: SystemClockConstants + PllConstants> ClockConstants for T {}