stm32f429zi/
interrupt_service.rs

1// Licensed under the Apache License, Version 2.0 or the MIT License.
2// SPDX-License-Identifier: Apache-2.0 OR MIT
3// Copyright Tock Contributors 2022.
4
5use crate::chip_specs::Stm32f429Specs;
6use stm32f4xx::chip::Stm32f4xxDefaultPeripherals;
7
8use crate::{can_registers, stm32f429zi_nvic, trng_registers};
9
10pub struct Stm32f429ziDefaultPeripherals<'a> {
11    pub stm32f4: Stm32f4xxDefaultPeripherals<'a, Stm32f429Specs>,
12    // Once implemented, place Stm32f429zi specific peripherals here
13    pub trng: stm32f4xx::trng::Trng<'a>,
14    pub can1: stm32f4xx::can::Can<'a>,
15    pub rtc: crate::rtc::Rtc<'a>,
16}
17
18impl<'a> Stm32f429ziDefaultPeripherals<'a> {
19    pub unsafe fn new(
20        clocks: &'a crate::clocks::Clocks<'a, Stm32f429Specs>,
21        exti: &'a crate::exti::Exti<'a>,
22        dma1: &'a crate::dma::Dma1<'a>,
23        dma2: &'a crate::dma::Dma2<'a>,
24    ) -> Self {
25        Self {
26            stm32f4: Stm32f4xxDefaultPeripherals::new(clocks, exti, dma1, dma2),
27            trng: stm32f4xx::trng::Trng::new(trng_registers::RNG_BASE, clocks),
28            can1: stm32f4xx::can::Can::new(clocks, can_registers::CAN1_BASE),
29            rtc: crate::rtc::Rtc::new(clocks),
30        }
31    }
32    // Necessary for setting up circular dependencies and registering deferred calls
33    pub fn init(&'static self) {
34        self.stm32f4.setup_circular_deps();
35        kernel::deferred_call::DeferredCallClient::register(&self.can1);
36        kernel::deferred_call::DeferredCallClient::register(&self.rtc);
37    }
38}
39impl kernel::platform::chip::InterruptService for Stm32f429ziDefaultPeripherals<'_> {
40    unsafe fn service_interrupt(&self, interrupt: u32) -> bool {
41        match interrupt {
42            // put Stm32f429zi specific interrupts here
43            stm32f429zi_nvic::HASH_RNG => {
44                self.trng.handle_interrupt();
45                true
46            }
47            stm32f4xx::nvic::CAN1_TX => {
48                self.can1.handle_transmit_interrupt();
49                true
50            }
51            stm32f4xx::nvic::CAN1_RX0 => {
52                self.can1.handle_fifo0_interrupt();
53                true
54            }
55            stm32f4xx::nvic::CAN1_RX1 => {
56                self.can1.handle_fifo1_interrupt();
57                true
58            }
59            stm32f4xx::nvic::CAN1_SCE => {
60                self.can1.handle_error_status_interrupt();
61                true
62            }
63            _ => self.stm32f4.service_interrupt(interrupt),
64        }
65    }
66}
stm32f429zi/interrupt_service.rs

stm32f429zi/
interrupt_service.rs
