rp2040/
sysinfo.rs

1// Licensed under the Apache License, Version 2.0 or the MIT License.
2// SPDX-License-Identifier: Apache-2.0 OR MIT
3// Copyright Tock Contributors 2022.
4
5use kernel::utilities::registers::interfaces::Readable;
6use kernel::utilities::StaticRef;
7
8use kernel::utilities::registers::{register_bitfields, register_structs, ReadWrite};
9
10register_structs! {
11
12    SysInfoRegisters {
13
14        (0x000 => chip_id: ReadWrite<u32, CHIP_ID::Register>),
15
16        (0x004 => platform: ReadWrite<u32, PLATFORM::Register>),
17
18        (0x008 => _reserved1),
19
20        (0x040 => gitref_rp2040: ReadWrite<u32, GITREF_RP2040::Register>),
21
22        (0x044 => @END),
23    }
24}
25register_bitfields![u32,
26    CHIP_ID [
27
28        REVISION OFFSET(28) NUMBITS(4) [],
29
30        PART OFFSET(12) NUMBITS(16) [],
31
32        MANUFACTURER OFFSET(0) NUMBITS(12) []
33
34    ],
35    PLATFORM [
36        ASIC OFFSET(1) NUMBITS(1) [],
37
38        FPGA OFFSET(0) NUMBITS(1) []
39
40    ],
41    GITREF_RP2040 [
42        SOURCE_GIT_HASH OFFSET(0) NUMBITS(32) []
43    ]
44];
45
46const SYSINFO_BASE: StaticRef<SysInfoRegisters> =
47    unsafe { StaticRef::new(0x40000000 as *const SysInfoRegisters) };
48
49pub enum Platform {
50    Asic,
51    Fpga,
52}
53
54pub struct SysInfo {
55    registers: StaticRef<SysInfoRegisters>,
56}
57
58impl SysInfo {
59    pub const fn new() -> SysInfo {
60        SysInfo {
61            registers: SYSINFO_BASE,
62        }
63    }
64
65    pub fn get_revision(&self) -> u8 {
66        self.registers.chip_id.read(CHIP_ID::REVISION) as u8
67    }
68
69    pub fn get_part(&self) -> u16 {
70        self.registers.chip_id.read(CHIP_ID::PART) as u16
71    }
72
73    pub fn get_manufacturer_rp2040(&self) -> u16 {
74        self.registers.chip_id.read(CHIP_ID::MANUFACTURER) as u16
75    }
76
77    pub fn get_asic(&self) -> u32 {
78        self.registers.platform.read(PLATFORM::ASIC)
79    }
80
81    pub fn get_fpga(&self) -> u32 {
82        self.registers.platform.read(PLATFORM::FPGA)
83    }
84
85    pub fn get_platform(&self) -> Platform {
86        if self.registers.platform.is_set(PLATFORM::ASIC) {
87            Platform::Asic
88        } else {
89            Platform::Fpga
90        }
91    }
92
93    pub fn get_git_ref(&self) -> u32 {
94        self.registers
95            .gitref_rp2040
96            .read(GITREF_RP2040::SOURCE_GIT_HASH)
97    }
98}