imxrt10xx/
nvic.rs

1// Licensed under the Apache License, Version 2.0 or the MIT License.
2// SPDX-License-Identifier: Apache-2.0 OR MIT
3// Copyright Tock Contributors 2022.
4
5//! Named constants for NVIC ids
6
7// Enabling only the needed constants
8
9pub const DMA0_16: u32 = 0;
10pub const DMA1_17: u32 = 1;
11pub const DMA2_18: u32 = 2;
12pub const DMA3_19: u32 = 3;
13pub const DMA4_20: u32 = 4;
14pub const DMA5_21: u32 = 5;
15pub const DMA6_22: u32 = 6;
16pub const DMA7_23: u32 = 7;
17pub const DMA8_24: u32 = 8;
18pub const DMA9_25: u32 = 9;
19pub const DMA10_26: u32 = 10;
20pub const DMA11_27: u32 = 11;
21pub const DMA12_28: u32 = 12;
22pub const DMA13_29: u32 = 13;
23pub const DMA14_30: u32 = 14;
24pub const DMA15_31: u32 = 15;
25pub const DMA_ERROR: u32 = 16;
26// pub const CM7: u32 = 17;
27// pub const CM7: u32 = 18;
28// pub const CM7: u32 = 19;
29pub const LPUART1: u32 = 20;
30pub const LPUART2: u32 = 21;
31// pub const LPUART3: u32 = 22;
32// pub const LPUART4: u32 = 23;
33// pub const LPUART5: u32 = 24;
34// pub const LPUART6: u32 = 25;
35// pub const LPUART7: u32 = 26;
36// pub const LPUART8: u32 = 27;
37pub const LPI2C1: u32 = 28;
38// pub const LPI2C2: u32 = 29;
39// pub const LPI2C3: u32 = 30;
40// pub const LPI2C4: u32 = 31;
41// pub const LPSPI1: u32 = 32;
42// pub const LPSPI2: u32 = 33;
43// pub const LPSPI3: u32 = 34;
44// pub const LPSPI4: u32 = 35;
45// pub const FLEXCAN1: u32 = 36;
46// pub const FLEXCAN2: u32 = 37;
47// pub const CM7: u32 = 38;
48// pub const KPP: u32 = 39;
49// pub const TSC_DIG: u32 = 40;
50// pub const GPR_IRQ: u32 = 41;
51// pub const LCDIF: u32 = 42;
52// pub const CSI: u32 = 43;
53// pub const PXP: u32 = 44;
54// pub const WDOG2: u32 = 45;
55// pub const SNVS_HP_WRAPPER: u32 = 46;
56// pub const SNVS_HP_WRAPPER: u32 = 47;
57pub const SNVS_LP_WRAPPER: u32 = 48;
58// pub const CSU: u32 = 49;
59// pub const DCP: u32 = 50;
60// pub const DCP: u32 = 51;
61// pub const DCP: u32 = 52;
62// pub const TRNG: u32 = 53;
63// pub const BEE: u32 = 55;
64// pub const SAI1: u32 = 56;
65// pub const SAI2: u32 = 57;
66// pub const SAI3: u32 = 58;
67// pub const SAI3: u32 = 59;
68// pub const SPDIF: u32 = 60;
69// pub const PMU: u32 = 61;
70// pub const Temperature_Monitor: u32 = 63;
71// pub const Temperature_Monitor: u32 = 64;
72// pub const USB_PHY: u32 = 65;
73// pub const USB_PHY: u32 = 66;
74// pub const ADC1: u32 = 67;
75// pub const ADC2: u32 = 68;
76// pub const DCDC: u32 = 69;
77// pub const GPIO1: u32 = 72;
78// pub const GPIO1: u32 = 73;
79// pub const GPIO1: u32 = 74;
80// pub const GPIO1: u32 = 75;
81// pub const GPIO1: u32 = 76;
82// pub const GPIO1: u32 = 77;
83// pub const GPIO1: u32 = 78;
84// pub const GPIO1: u32 = 79;
85pub const GPIO1_1: u32 = 80;
86pub const GPIO1_2: u32 = 81;
87pub const GPIO2_1: u32 = 82;
88pub const GPIO2_2: u32 = 83;
89pub const GPIO3_1: u32 = 84;
90pub const GPIO3_2: u32 = 85;
91pub const GPIO4_1: u32 = 86;
92pub const GPIO4_2: u32 = 87;
93pub const GPIO5_1: u32 = 88;
94pub const GPIO5_2: u32 = 89;
95// pub const FLEXIO1: u32 = 90;
96// pub const FLEXIO2: u32 = 91;
97// pub const WDOG1: u32 = 92;
98// pub const RTWDOG: u32 = 93;
99// pub const EWM: u32 = 94;
100// pub const CCM: u32 = 95;
101// pub const CCM: u32 = 96;
102// pub const GPC: u32 = 97;
103// pub const SRC: u32 = 98;
104pub const GPT1: u32 = 100;
105pub const GPT2: u32 = 101;
106// pub const FLEXPWM1: u32 = 102;
107// pub const FLEXPWM1: u32 = 103;
108// pub const FLEXPWM1: u32 = 104;
109// pub const FLEXPWM1: u32 = 105;
110// pub const FLEXPWM1: u32 = 106;
111// pub const FLEXSPI: u32 = 108;
112// pub const SEMC: u32 = 109;
113// pub const USDHC1: u32 = 110;
114// pub const USDHC2: u32 = 111;
115// pub const USB: u32 = 112;
116// pub const USB: u32 = 113;
117// pub const ENET: u32 = 114;
118// pub const ENET: u32 = 115;
119// pub const XBAR1: u32 = 116;
120// pub const XBAR1: u32 = 117;
121// pub const ADC_ETC: u32 = 118;
122// pub const ADC_ETC: u32 = 119;
123// pub const ADC_ETC: u32 = 120;
124// pub const ADC_ETC: u32 = 121;
125// pub const PIT: u32 = 122;
126// pub const ACMP: u32 = 123;
127// pub const ACMP: u32 = 124;
128// pub const ACMP: u32 = 125;
129// pub const ACMP: u32 = 126;
130// pub const ENC1: u32 = 129;
131// pub const ENC2: u32 = 130;
132// pub const ENC3: u32 = 131;
133// pub const ENC4: u32 = 132;
134// pub const QTIMER1: u32 = 133;
135// pub const QTIMER2: u32 = 134;
136// pub const QTIMER3: u32 = 135;
137// pub const QTIMER4: u32 = 136;
138// pub const FLEXPWM2: u32 = 137;
139// pub const FLEXPWM2: u32 = 138;
140// pub const FLEXPWM2: u32 = 139;
141// pub const FLEXPWM2: u32 = 140;
142// pub const FLEXPWM2: u32 = 141;
143// pub const FLEXPWM3: u32 = 142;
144// pub const FLEXPWM3: u32 = 143;
145// pub const FLEXPWM3: u32 = 144;
146// pub const FLEXPWM3: u32 = 145;
147// pub const FLEXPWM3: u32 = 146;
148// pub const FLEXPWM4: u32 = 147;
149// pub const FLEXPWM4: u32 = 148;
150// pub const FLEXPWM4: u32 = 149;
151// pub const FLEXPWM4: u32 = 150;
152// pub const FLEXPWM4: u32 = 151;
imxrt10xx/nvic.rs

imxrt10xx/
nvic.rs
